151.2.1.3 Installation of TRACE processes on LTUR modules

In the ROLM modules of an LTUR shelf, trace processes are not set up by specifying the processes; rather, the trace process is activated using a trace control code 2 bytes long. These are specified as 2 concatenated single values, input as parameter PROC: PROC= <byte 1> & <byte 2>.
The composition of the 2 byte trace control code is as follows (taken from "LTUR trace Function - Component spec, ROLM Systems, author: Esther Poon"):
•
Byte I:
 
T on
off
TRACE Class / Trigger code
Figure 18
Structure of the Trace Control Code
a)
T-on/off = 1: Activation of trace functions
 
1
on
off
all
ckt
snd
only
rcv
only
int
task
 
 
 
7
6
5
4
3
2
1
0
Figure 19
Trace Functions
ON/OFF BIT: when set, the indicated trace state is to be reset (if it was on).
SEND ONLY BIT: when set, only messages sent are to be traced.
RECEIVE ONLY BIT: when set, only messages received are to be traced.
ALL CIRCUIT BIT: when set, the trace state is to be indicated for all circuits on the indicated trace object. If this bit is set the circuit number from the message is ignored.
INTERNAL TASK BIT: when set, internal functions (other than the mailbox messages) of the indicated trace object are to be reported.
b)
T-on/off = 0: Stop conditions for trace functions
 
0
Trace Class
Trace Trigger Code
 
7
6
5
4
3
2
1
0
Figure 20
Trace-Classes and Trigger Code
There are 4 trace classes (bit 6 - 4) for setting the conditions which deactivate the trace functions and these trace classes have their specific trace trigger code (bit 3 - 0).
 
Class Code
Trace Class Definition
Trace Trigger Code
 
 
000
OV2
N/A
 
 
001
ERR CODE
specified error code
 
 
010
STATE CODE
specified state number
 
 
others
not defined
 
 
OV2: when set, the trace is to be reset when the overload threshold 2 is encountered.
ERR CODE: when set, the trace is to be reset when the specified error code (bit 3 - 0) of the given task/module occurs.
STATE CODE: when set, the trace is to be reset when the specified state (bit 3 - 0) of the given task/module occurs.
•
Byte II:
 
mm
imf
Task/Module ID
 
7
6
5
4
3
2
1
0
Figure 21
Task/Module ID
MM (MAIN MICRO) BIT: when set, the trace state is to be set for the indicated components in the main micro.
IMF (IMF/DFE Server) BIT: when set, the trace state is to be set for the indicated components in the IMF/DFE Server.
TASK/MODULE ID (bit 5 - 0): when either MM BIT or IMF BIT is set, the Task/Module ID defines the various task or modules which should be activated/deactivated for tracing.
The following is an overview of the possibilities for byte II.
Byte II mm imf Task/Module ID Meaning of Task/Module ID
00 0 0 0 No task in neither MM nor IMF
40 0 1 0 No task/module in IMF/DFE Server
41 0 1 1 I_ICONFIG
42 0 1 2 I_Restart
43 0 1 3 I_IPRC sender
44 0 1 4 I_IPRC receiver
45 0 1 5 IMF/DFE engine interface
4A 0 1 10 RLI/DFE
4B 0 1 11 State messaging circuit state machine
4D 0 1 13 I_Card state machine
4E 0 1 14 TTI_BS state machine
4F 0 1 15 DID_BS state machine
51 0 1 17 ATI_BS state machine
52 0 1 18 DIR_BS state machine
7F 0 1 3F All tasks/modules in IMF/DFE Server
80 1 0 0 No task/module in MAIN
81 1 0 1 M_ICONFIG
82 1 0 2 M_Restart
83 1 0 3 M_IPRC sender
84 1 0 4 M_IPRC receiver
85 1 0 5 Connection management
86 1 0 6 Config assimilator
8A 1 0 10 RLI dependability
8B 1 0 11 RCC
8C 1 0 12 DFE
8D 1 0 13 M_Card state machine
8E 1 0 14 TTI circuit state machine
8F 1 0 15 DID circuit state machine
90 1 0 16 COT circuit state machine
91 1 0 17 ATI circuit state machine
92 1 0 18 T1 circuit state machine
BF 1 0 3F All tasks/modules in MAIN
Procedure Overview
 
Kommandocode
Parameter
ADD-PETRA
TYPE=LTUR,[LTG=<number>],LTU=<number>
 
,[SLOT=<number>],CCT=<number>,BYTE1=<hex>
 
,BYTE2=<hex>;
Example
The processes 1, 3, 5 to 9 and 11 are to be traced from the LTG=1, LTU=2, SLOT=19, and circuit number=5.
Input:
ADD-PETRA:STD,1,2,19,5,1&3&5&&9&B;
An LTUR module in LTG=1, LTU=4, SLOT=133, circuit number=3, should be set up with the trace control code A8 and 7F for tracing.
Input:
ADD-PETRA:LTUR,1,4,133,3,A8,7F;
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